Guo Ming-qiang discusses the gap between TSMC’s CoWoS and Intel’s EMIB, revealing that Google previously asked to skip MediaTek and submit chips in-house

Analyst Guo Ming-chi revealed that Google once asked TSMC about the cost difference between doing the die bumping in-house and having MediaTek handle the die bumping. With outside attention focused on the advanced packaging plans behind Google’s next-generation TPU, Guo Ming-chi also noted that the EMIB-T packaging technology Intel is developing reportedly already has a yield of 90% in Google’s 2027 H2 new TPU “Humufish” project. This is a positive signal for Intel Foundry and its advanced packaging business, but key challenges remain before true mass production.

AI data centers: for every 1% yield, cost is tested

Guo Ming-chi said Intel already has experience in stable production of EMIB. Therefore, the validation yield of the in-development EMIB-T technology reaching 90% is a “positive but reasonable” signal. However, Intel internally uses FCBGA as the benchmark for comparing EMIB production yield, and currently the industry’s FCBGA production yield is around 98% or higher. This means that while Intel EMIB-T has already cleared an important technical validation threshold, increasing yield further from 90% to 98% could be harder than going from kickoff to reaching 90%.

That’s also why Google cares. On the surface, 90% versus 98% is only an 8-percentage-point difference, but for high-priced, large-area, multi-die packaging products like AI chips, the yield gap will translate directly into cost, delivery timelines, and effective output. Especially since Humufish still has some specifications not finalized, a validation yield is not the same as the final mass-production yield. So while Guo Ming-chi views Intel’s long-term advanced packaging development positively, he also reminds that in the short to mid term, attention should still be paid to how Intel overcomes mass-production challenges.

Google asked TSMC about cost differences between in-house die bumping and MediaTek’s die bumping

From Google’s perspective, this is not just a packaging technology choice—it’s a cost war in competing against Nvidia. Guo Ming-chi revealed that Google has recently asked TSMC how much cost could be saved if Humufish’s main compute die is bump-fabricated by Google itself rather than outsourced to MediaTek. This detail is particularly critical because it indicates Google has begun re-examining even the die-bumping mark-up that could previously be viewed as pass-through.

Google and MediaTek’s collaboration on TPUs initially adopts a semi-COT model. Guo Ming-chi said MediaTek’s mark-up mainly comes from parts that it designs itself. Therefore, whether Google personally bumps the main compute die is not the core for observing MediaTek’s profit-growth trend. But Google wants to confirm the cost differences even within the die-bumping process, reflecting that its cost-control mindset has shifted from the relatively more relaxed “good guy” approach in the past to a meticulous calculator that counts every penny.

The industry logic behind this is clear: Google’s TPU is not only an AI accelerator for internal use, but also an important weapon for Google to counter Nvidia’s GPU ecosystem. If TPU is to become a large-scale alternative adopted by cloud customers, it can’t only compete on performance; it must also demonstrate advantages in total cost of ownership, supply stability, and cost per unit compute. As a result, Intel EMIB-T’s mass-production yield, substrate supply, and advanced-process capacity allocation will all become key to whether Google can amplify TPU competitiveness.

TSMC CoWoS 98% yield still has a huge advantage

By contrast, regarding TSMC’s production yield target for 2026 May 5.5-reticle CoWoS, according to Guo Ming-chi, it starts from 98%. This means that even though Intel EMIB-T’s 90% validation yield is impressive, it still doesn’t reach the level expected by Google, TSMC, and major cloud customers in the mature mass-production stage. In other words, Intel is making a breakthrough in the advanced packaging narrative, but it still needs mass-production data to prove itself before it can truly challenge TSMC’s CoWoS dominance.

Guo Ming-chi also added that TSMC is currently still evaluating how much advanced-process capacity to allocate to Humufish in 2027 H2 for two reasons. First, TSMC still hopes to secure Humufish’s back-end packaging orders, but it appears the difficulty is relatively high—which may be a supply-chain strategy intended by Google. Second, TSMC still needs to evaluate the actual back-end output on Intel EMIB-T and the substrate side, to avoid mis-allocating scarce advanced-process capacity.

As for Humufish’s semi-COT die-bumping arrangement, Guo Ming-chi said TSMC itself also tends to have MediaTek handle the main compute die bumping. Beyond the good relationship between TSMC and MediaTek, the more critical factor is that MediaTek is already TSMC’s third-largest advanced-process customer in 2025. If TPU orders later change, MediaTek’s die-bumping scale and product mix make it easier to help TSMC adjust the allocation of advanced-process capacity, acting as a buffer.

This article about Guo Ming-chi discussing the gap between TSMC CoWoS and Intel EMIB, revealing that Google previously asked about skipping MediaTek’s in-house die bumping, first appeared on Lianwen News ABMedia.