Lambdas, pioneering the industry's first HBM4E controller IP to revolutionize AI solutions

Rambus Inc. today announced the release of the HBM4E memory controller IP. This solution is the industry’s first product designed specifically to meet high memory bandwidth demands, capable of supporting next-generation AI accelerators, graphics processors, and high-performance computing systems. The new controller supports up to 16Gb/s per pin, providing up to 4.1TB/s of memory bandwidth per HBM4E device.

HBM4E devices use vertically stacked DRAM chips, offering extremely high memory bandwidth and low latency characteristics, with performance especially evident in AI and high-performance computing systems. Supporting AI accelerator configurations, this solution can achieve over 32TB/s of total memory bandwidth when connecting eight HBM4E stacks, making it ideal for large-scale model training and data-intensive workloads.

High-bandwidth memory has become a fundamental technology for modern AI chips, helping to bridge the gap between computational throughput and memory access speed. Rambus aims to achieve significant differentiation in AI chip design through this controller IP.

The new HBM4E controller is developed based on Rambus’s extensive experience with over 100 successful HBM designs and long-term expertise in memory interface IP. It incorporates reliability features to help customers succeed on their first tape-out.

This IP can be used in conjunction with third-party standard or silicon-connected PHY solutions to build HBM4E memory subsystems within 2.5D or 3D packages. This provides flexibility for integration into AI SoCs or custom chips, supporting diverse designs for cloud, enterprise, and edge deployment scenarios. The IP is now available for licensing and is offered to design customers through early access programs.