TetraMem, a semiconductor design company located in Silicon Valley, announced that its SoC MLX 200 platform, based on TSMC’s 22-nanometer RRAM chips, has successfully completed tape-out, fabrication, and verification. This new technology can perform computation directly within memory arrays, addressing data transfer, power consumption, and heat-dissipation limitations faced by edge artificial intelligence. Use cases include wearable devices, voice processing, and more. Samples are expected to ship in the second half of this year.
How in-memory computing overcomes traditional data-transfer bottlenecks
As artificial intelligence workloads continue to expand, system performance is constrained by data transfer between memory and compute units. Simulated in-memory computing offers a fundamentally different approach: it performs calculations inside the memory array itself, reducing data movement and improving efficiency. TetraMem’s MLX200 platform integrates multi-level RRAM arrays with a mixed-signal computing engine, enabling high-throughput vector-matrix operations in memory while maintaining compatibility with advanced CMOS process technologies.
TSMC 22-nanometer processing advantages for introducing multi-level RRAM
Based on multi-level RRAM Memory technology verified on TSMC’s 22-nanometer process, the manufacturing process demonstrates high CMOS compatibility. In terms of compute performance, it features low-voltage and low-current operation characteristics, along with robust data retention and endurance. In addition, the technology supports higher memory and compute density. Initial chip test results show a high level of functional consistency across each array, confirming the commercial viability of this design approach for memory applications.
This technical progress builds on TetraMem’s earlier MX 100 platform, manufactured on TSMC’s 65-nanometer CMOS process. The company has previously demonstrated that multi-level RRAM devices have thousands of conductance levels, and related academic research was published in Nature in March 2023. The early results have been extended to more advanced processes. Since 2019, TetraMem has worked with TSMC to develop and advance RRAM technology research.
Edge AI application scenarios development plan
The Tetra MLX 200 and MLX 201 platforms are mainly designed for edge artificial intelligence (Edge AI) with high sensitivity to power consumption and latency. Application scenarios include speech and audio processing, wearable devices, IoT systems, and sensor application systems that need to operate continuously. TetraMem plans to begin providing samples in the second half of this year, and its multi-layer RRAM memory intellectual property (IP) will also be made available for licensing evaluation. Dr. Glenn Ge, co-founder and CEO of TetraMem, said the company’s long-standing partnership with TSMC proves the feasibility of taking multi-level RRAM architectures beyond the lab and into commercial chips using advanced manufacturing processes, providing real-world use cases for next-generation edge AI.
This article Edge AI breakthrough development: TetraMem releases results for its MLX200 platform built on TSMC 22-nanometer chips first appeared on Chain News ABMedia.
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